CTAccel
R&D Director
Michel has 9 years of R&D and R&D management experience and 7 years of experience in image and video product development. Leading the research and development of 8 products, some of which are mass-produced or landed on the customer side. The products include video codec nodes and image codec acceleration schemes. He obtained a master's degree in computer technology and a bachelor's degree in electrical engineering from the Graduate School of the Chinese Academy of Sciences and the University of Shanghai for Science and Technology.
Tracks he partipates
Solutions
Throughout perfect technology services and solutions, we will solve the difficulties of company and make business trial and error mixed with iteration quickly.
His topics
1.Brief explanation on FPGA, CPU, GPU & ASIC that used in computing, and their specialties;2.Models based on Heterogeneous computing, including bandwidth, memory, FPGA memory required and how functions utilizes heterogeneous structure;3.Methods and process in development of FPGA, including RTL or new HLS;4.FPGA used in image processing acceleration, including image decoding, pixel processing;5.FPGA used in video processing acceleration, including video decoding/encoding, pixel processing
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